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sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 1 post office box 655303 ? dallas, texas 75265 improved speed and package replacement for the sn75lbc976 designed to operate at up to 20 million data transfers per second (fast-20 scsi) nine differential channels for the data and control paths of the small computer systems interface (scsi) and intelligent peripheral interface (ipi) sn75976a packaged in shrink small-outline package with 25-mil terminal pitch (dl) and thin shrink small-outline package with 20-mil terminal pitch (dgg) sn55976a packaged in a 56-pin ceramic flat pack (wd) two skew limits available esd protection on bus terminals exceeds 12 kv low disabled supply current 8 ma typ thermal shutdown protection positive- and negative-current limiting power-up/down glitch protection description the sn75976a is an improved replacement for the industry's first 9-channel rs-485 transceiver e the sn75lbc976. the a version offers improved switching performance, a smaller package, and higher esd protection. the sn75976a is offered in two versions. the '976a2 skew limits of 4 ns for the differential drivers and 5 ns for the differential receivers complies with the recommended skew budget of the fast-20 scsi standard for data transfer rates up to 20 million transfers per second. the '976a1 supports the fast scsi skew budget for 10 million transfers per second. the skew limit ensures that the propagation delay times, not only from channel-to-channel but from device-to-device, are closely matched for the tight skew budgets associated with high-speed parallel data buses. the patented thermal enhancements made to the 56-pin shrink small-outline package (ssop) of the sn75976 have been applied to the new, thin shrink, small-outline package (tssop). the tssop package offers even less board area requirements than the ssop while reducing the package height to 1 mm. this provides more board area and allows component mounting to both sides of the printed circuit boards for low-profile, space-restricted applications such as small form-factor hard disk drives. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. terminals 13 through 17 and 40 through 44 are connected together to the package lead frame and signal ground. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 gnd bsr cre 1a 1de/re 2a 2de/re 3a 3de/re 4a 4de/re v cc gnd gnd gnd gnd gnd v cc 5a 5de/re 6a 6de/re 7a 7de/re 8a 8de/re 9a 9de/re cde2 cde1 cde0 9b+ 9b 8b+ 8b 7b+ 7b 6b+ 6b v cc gnd gnd gnd gnd gnd v cc 5b+ 5b 4b+ 4b 3b+ 3b 2b+ 2b 1b+ 1b sn75976a dgg or dl sn55976a wd (top view) production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. copyright ? 1997, texas instruments incorporated
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 2 post office box 655303 ? dallas, texas 75265 description (continued) in addition to speed improvements, the '976a can withstand electrostatic discharges exceeding 12 kv using the human-body model, and 600 v using the machine model of mil-prf-38535, method 3015.7 on the rs-485 i/o terminals. this is six times the industry standard and provides protection from the noise that can be coupled into external cables. the other terminals of the device can withstand discharges exceeding 4 kv and 400 v respectively. each of the nine channels of the '976a typically meet or exceed the requirements of eia rs-485 (1983) and iso 8482-1987/ tia tr30.2 referenced by american national standard of information (ansi) systems, x3.131-1994 (scsi-2) standard, x2.277-1996 (fast-20 parallel interface), and the intelligent peripheral interface physical layer-ansi x3.129-1986 standard. the sn75976a is characterized for operation over an ambient air temperature range of 0 c to 70 c. the sn55976a is characterized for operation over an ambient air temperature range of 55 c to 125 c. available options t a skew limit (ns) package 2 t a driver receiver tssop (dgg) ssop (dl) ceramic flat pack (wd) 0 cto70 5 c 8 9 SN75976A1DGG SN75976A1DGGr sn75976a1dl sn75976a1dlr e 0 c to 70 c 4 5 sn75976a2dgg sn75976a2dggr sn75976a2dl sn75976a2dlr e 55 cto125 5 c 8 9 e e sn55976a1wd 55 c to 125 c 4 5 e e sn55976a2wd 2 the r suffix indicates taped and reeled packages.
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 3 post office box 655303 ? dallas, texas 75265 terminal functions terminal logic i/o termination description name no. g level i/o termination description 1a to 9a 4,6,8,10, 19,21,23, 25,27 ttl i/o pullup 1a to 9a carry data to and from the communication controller. 1b to 9b 29,31,33, 35,37,.46, 48,50,52 rs-485 i/o pulldown 1b to 9b are the inverted data signals of the balanced pair to/from the bus. 1b+ to 9b+ 30,32,34, 36,38,47, 49,51,53 rs-485 i/o pullup 1b+ to 9b+ are the noninverted data signals of the balanced pair to/from the bus. bsr 2 ttl input pullup bsr is the bit significant response. bsr disables receivers 1 through 8 and enables wired-or drivers when bsr and de/re and cde1 or cde2 are high. channel 9 is placed in a high-impedance state with bsr high. cde0 54 ttl input pulldown cde0 is the common driver enable 0. its input signal enables all drivers when cde0 and 1de/re 9de/re are high. cde1 55 ttl input pulldown cde1 is the common driver enable 1. its input signal enables drivers 1 to 4 when cde1 is high and bsr is low. cde2 56 ttl input pulldown cde2 is the common driver enable 2. when cde2 is high and bsr is low, drivers 5 to 8 are enabled. cre 3 ttl input pullup cre is the common receiver enable. when high, cre disables receiver channels 5 to 9. 1de/re to 9de/re 5,7,9,11, 20,22,24, 26,28 ttl input pullup 1de/re 9de/re are direction controls that transmit data to the bus when it and cde0 are high. data is received from the bus when 1de/re 9de/re and cre and bsr are low and cde1 and cde2 are low. gnd 1,13,14, 15,16,17, 40,41,42, 43,44 na power na gnd is the circuit ground. all gnd terminals except terminal 1 are physically tied to the die pad for improved thermal conductivity. 2 v cc 12,18,39, 45 na power na supply voltage 2 terminal 1 must be connected to signal ground for proper operation.
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 4 post office box 655303 ? dallas, texas 75265 logic diagram (positive logic) channel 2 channel 3 channel 4 channel 6 channel 7 channel 8 54 55 2 4 5 6 7 8 9 10 11 56 3 19 20 21 22 23 24 25 26 27 28 30 29 32 31 34 33 36 35 38 37 47 46 49 48 51 50 53 52 cde0 cde1 bsr 1a 1de/re 2a 2de/re 3a 3de/re 4a 4de/re cde2 cre 5a 5de/re 6a 6de/re 7a 7de/re 8a 8de/re 9a 9de/re 1b+ 1b 2b+ 2b 3b+ 3b 4b+ 4b 5b+ 5b 6b+ 6b 7b+ 7b 8b+ 8b 9b+ 9b bsr bsr cre cde0 2354
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 5 post office box 655303 ? dallas, texas 75265 schematics of inputs and outputs 1 k w 8 v input v cc 1 k w 8 v input v cc 100 k w input 100 k w 2 k w 18 k w 4 k w 16 v 16 v input 100 k w 2 k w 18 k w 4 k w 16 v 16 v v cc v cc 16 v 16 v 18 k w 4 k w 2 k w output v cc output v cc de/re , cre , bsr, and a inputs cde0, cde1, and cde2 inputs b + input b input b + and b outputs a output 40 w 8 v 100 k w
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 6 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 supply voltage range, v cc (see note 1) 0.3 v to 6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . bus voltage range 10 v to 15 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . data i/o and control (a side) voltage range 0.3 v to v cc +0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . electrostatic discharge: b side and gnd, class 3, a: (see note 2) 12 kv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b side and gnd, class 3, b: (see note 2) 400 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . all terminals, class 3, a: 4 kv . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . all terminals, class 3, b: 400 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous total power dissipation (see note 3) internally limited . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. all voltage values are with respect to the gnd terminals. 2. this absolute maximum rating is tested in accordance with mil-prf-38535, method 3015.7. 3. the maximum operating junction temperature is internally limited. use the dissipation rating table to operate below this temperature. dissipation rating table package t a 25 c operating factor 3 above t a = 25 c t a = 70 c power rating t a = 125 c power rating dgg 2500 mw 20 mw/ c 1600 mw e dl 2500 mw 20 mw/ c 1600 mw e wd 1300 mw 10.5 mw/ c 827 mw 250 mw 3 this is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. package thermal characteristics min nom max unit junction to ambient thermal resistance r q ja dgg, board-mounted, no air flow 50 c/w j u nction - to - ambient thermal resistance , r q ja dl, board-mounted, no air flow 50 c/w junction-to-ambient thermal resistance, r q ja wd 95.4 c/w junction to case thermal resistance r q jc dgg 27 c/w j u nction - to - case thermal resistance , r q jc dl 12 c/w junction-to-case thermal resistance, r q jc wd 5.67 c/w thermal-shutdown junction temperature, t js 165 c
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 7 post office box 655303 ? dallas, texas 75265 recommended operating conditions min nom max unit supply voltage, v cc 4.75 5 5.25 v high-level input voltage, v ih except nb+, nb 2 2 v low-level input voltage, v il except nb+, nb 2 0.8 v voltage at any bus terminal (se p arately or common mode) v o v i or v ic nb+ or nb 12 v voltage at an y b u s terminal (separatel y or common - mode) , v o , v i , or v ic nb + or nb 7 v high level out p ut current i oh driver 60 ma high - le v el o u tp u t c u rrent , i oh receiver 8 ma low level out p ut current i ol driver 60 ma lo w- le v el o u tp u t c u rrent , i ol receiver 8 ma operating case temperature, t c sn75976a 0 125 c o p erating free air tem p erature t a sn75976a 0 70 c operating free - air temperat u re , t a sn55976a 55 125 c 2 n = 1 9
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 8 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions sn55976a sn75976a unit parameter test conditions min typ 2 max min typ 2 max unit s1 to a, v t = 5 v, see figure 1 0.7 1 1.8 v v odh driver differential high- level out p ut voltage s1 to b, t c 25 c v t = 5 v, see figure 1 1 1.4 v level out ut voltage s1 to b, see figure 1 v t = 5 v, 0.7 0.8 v d i diff ti l l s1 to a, t c 25 c v t = 5 v, see figure 1 0.7 1.4 1 1.4 v v odl driver differential low- level out p ut voltage s1 to b, v t = 5 v, see figure 1 0.7 1.8 1 1.8 v level out ut voltage s1 to a, see figure 1 v t = 5 v, 0.8 1.4 0.8 1.4 v v oh high-level output volt- age a side, i oh = 8 ma v id = 200 mv, see figure 3 4 4.5 4 4.5 v oh age b side, v t = 5 v, see figure 1 3 3 v v ol low-level output volt- age a side, i oh = 8 ma v id = 200 mv, see figure 3 0.6 0.8 0.6 0.8 v ol age a side, v t = 5 v, see figure 1 1 1 v v it+ receiver positive-go- ing differential input threshold voltage i oh = 8 ma, see figure 3 0.2 0.2 v v it receiver negative- going differential input threshold voltage i ol = 8 ma, see figure 3 0.2 0.2 v v hys receiver input hysteresis (v it+ v it ) v cc = 5 v, t a = 25 c 24 45 24 45 mv v ih = 12 v, v cc = 5 v, other input at 0 v 0.4 1 0.4 1 ma i i bus in p ut current v ih = 12 v, v cc = 0, other input at 0 v 0.5 1 0.5 1 ma i i b u s inp u t c u rrent v ih = 7 v, v cc = 5 v, other input at 0 v 0.4 0.8 0.4 0.8 ma v ih = 7 v, v cc = 0, other input at 0 v 0.3 0.8 0.3 0.8 ma i ih high-level input cur- a, bsr, de/re , and cre , v ih = 2 v 100 100 m a i ih g rent cde0, cde1, and cde2, v ih = 2v 100 100 m a i il low level in p ut current a, bsr, de/re , and cre , v il = 0.8 v 100 100 m a i il lo w- le v el inp u t c u rrent cde1, cde1, and cde2, v il = 0.8 v 100 100 m a i os short circuit output current nb+ or nb 260 260 ma i oz high-impedance-state a see i ih and i il see i ih and i il i oz g output current nb+ or nb see i i see i i disabled 10 10 ma i cc supply current all drivers enabled, no load 60 60 ma all receivers enabled, no load 45 45 ma c o output capacitance nb+ or nb to gnd 18 18 25 pf c d power dissipation ca p acitance receiver 40 40 pf c pd capacitance (see note 4) driver 100 100 pf 2 all typical values are at v cc = 5 v, t a = 25 c. note 4: c pd determines the no-load dynamic supply current consumption, i s = c pd v cc f + i cc
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 9 post office box 655303 ? dallas, texas 75265 driver switching characteristics over recommended operating conditions (unless otherwise noted) parameter test conditions sn75976a unit parameter test conditions min typ 2 max unit 2.5 13.5 ns '976a1 v cc = 5 v, t c = 25 c 3 11 ns t d propagation delay time, t phl or t plh v cc = 5 v, t c = 100 c 5 13 ns t pd gy, phl plh (see figures 1 and 2) 4.5 11.5 ns '976a2 v cc = 5 v, t c = 25 c 5 9 ns v cc = 5 v, t c = 100 c 7 11 ns t k(li ) skew limit, maximum t p d minimum t p d '976a1 8 ns t sk(lim) , dd (see note 5) '976a2 4 ns t sk(p) pulse skew, |t phl t plh | 4 ns t f fall time s1 to b, see figure 2 4 ns t r rise time see figure 2 8 ns t en enable time, control inputs to active output 50 ns t dis disable time, control inputs to high-impedance output 100 ns t phz propagation delay time, high-level to high-impedance output 17 100 ns t plz propagation delay time, low-level to high-impedance output see figures 5 and 6 25 100 ns t pzh propagation delay time, high-impedance to high-level output see fig u res 5 and 6 17 50 ns t pzl propagation delay time, high-impedance to low-level output 17 50 ns 2 all typical values are at v cc = 5 v, t a = 25 c. note 5: this parameter is applicable at one v cc and operating temperature within the recommended operating conditions and to any two devices. driver switching characteristics over recommended operating conditions (unless otherwise noted) parameter test conditions sn55976a unit parameter test conditions min typ 2 max unit t d propagation delay time, t phl or t plh '976a1 v cc = 5 v, t a = 25 c 15 ns t pd gy, phl plh (see figures 1 and 2) '976a2 v cc = 5 v, t a = 25 c 13.5 ns t k(li ) skew limit, maximum t p d minimum t p d '976a1 8 ns t sk(lim) , dd (see note 5) '976a2 4 ns t sk(p) pulse skew, |t phl t plh | 4 ns t f fall time s1 to b, see figure 2 4 ns t r rise time see figure 2 8 ns t en enable time, control inputs to active output 60 ns t dis disable time, control inputs to high-impedance output 140 ns t phz propagation delay time, high-level to high-impedance output 120 ns t plz propagation delay time, low-level to high-impedance output see figures 5 and 6 120 ns t pzh propagation delay time, high-impedance to high-level output see fig u res 5 and 6 60 ns t pzl propagation delay time, high-impedance to low-level output 60 ns 2 all typical values are at v cc = 5 v, t a = 25 c. note 5. this parameter is applicable at one v cc and operating temperature within the recommended operating conditions and to any two devices.
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 10 post office box 655303 ? dallas, texas 75265 receiver switching characteristics over recommended operating conditions (unless otherwise noted) parameter test conditions sn75976a unit parameter test conditions min typ 2 max unit '976a1 7.5 16.5 ns t d propagation delay time, t phl or t plh 8.5 14.5 ns t pd gy, phl plh (see figures 3 and 4) '976a2 v cc = 5 v, t c = 25 c 8.6 13.6 ns v cc = 5 v, t c = 100 c 9 14 ns t k(li ) skew limit, maximum t p d minimum t p d '976a1 9 ns t sk(lim) , dd (see note 5) '976a2 5 ns t sk(p) pulse skew, |t phl t plh | 0.6 4 ns t t transition time (t r or t f ) see figure 4 2 ns t en enable time, control inputs to active output 50 ns t dis disable time, control inputs to high-impedance output 60 ns t phz propagation delay time, high-level to high-impedance output 60 ns t plz propagation delay time, low-level to high-impedance output see figures 7 and 8 50 ns t pzh propagation delay time, high-impedance to high-level output see fig u res 7 and 8 50 ns t pzl propagation delay time, high-impedance to low-level output 50 ns 2 all typical values are at v cc = 5 v, t a = 25 c. note 5. this parameter is applicable at one v cc and operating temperature within the recommended operating conditions and to any two devices. receiver switching characteristics over recommended operating conditions (unless otherwise noted) parameter test conditions sn55976a unit parameter test conditions min typ 2 max unit t d propagation delay time, t phl or t plh '976a1 v cc = 5 v, t a = 25 c 19 ns t pd gy, phl plh (see figures 3 and 4) '976a2 v cc = 5 v, t a = 25 c 16 ns t k(li ) skew limit, maximum t p d minimum t p d '976a1 9 ns t sk(lim) , dd (see note 5) '976a2 5 ns t sk(p) pulse skew, |t phl t plh | 0.6 4 ns t t transition time (t r or t f ) see figure 4 2 ns t en enable time, control inputs to active output 70 ns t dis disable time, control inputs to high-impedance output 80 ns t phz propagation delay time, high-level to high-impedance output 80 ns t plz propagation delay time, low-level to high-impedance output see figures 7 and 8 70 ns t pzh propagation delay time, high-impedance to high-level output see fig u res 7 and 8 70 ns t pzl propagation delay time, high-impedance to low-level output 70 ns 2 all typical values are at v cc = 5 v, t a = 25 c. note 5. this parameter is applicable at one v cc and operating temperature within the recommended operating conditions and to any two devices.
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 11 post office box 655303 ? dallas, texas 75265 parameter measurement information i o i o v od v o v o b+ b a i i 15 pf 15 pf 75 w 165 w 375 w 375 w s1 s2 165 w sn75976a = 5 v sn55976a = 4.5 v ab v i input (see note a) 2 2 cde0 and de/re are at 2 v, bsr is at 0.8 v and, for the sn75976a only, all others are open. 3 for the sn75976a only, all nine drivers are enabled, similarly loaded, and switching. figure 1. driver test circuit, currents, and voltages 3 1.5 v 1.5 v 90% 90% 10% 10% 0v 0v t plh t phl 3 v 0 v v od(h) v od(l) s1 to a or b input output, v od t r t f figure 2. driver delay and transition time test waveforms generator (see note a) generator (see note a) 50 w 50 w v id input b i o v o 2 cde0, cde1, cde2, bsr, cre, and de/re at 0.8 v c l = 15 pf output input b + 2 3 for the sn75976a only, all nine receivers are enabled and switching. figure 3. receiver propagation delay and transition time test circuit 3 notes: a. all input pulses are supplied by a generator having the following characteristics: t r 6 ns, t f 6 ns, prr 1 mhz, duty cycle = 50%, z o = 50 w . b. all resistances are in w and 5%, unless otherwise indicated. c. all capacitances are in pf and 10%, unless otherwise indicated. d. all indicated voltages are 10 mv.
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 12 post office box 655303 ? dallas, texas 75265 parameter measurement information 1.5 v 1.5 v 90% 90% 10% 10% 1.4 v 1.4 v t plh t phl 3 v 0 v v oh v ol input b output t r t f input b + figure 4. receiver delay and transition time waveforms v od b+ b a 50 pf 50 pf 2 75 w 165 w 375 w 375 w 165 w 4.5 v ab see table 1 2 includes probe and jig capacitance in two places. 0 v or 3 v s1 de/re input s2 figure 5. driver enable and disable time test circuit table 1. enabling for driver enable and disable time driver bsr cde0 cde1 cde2 cre 1 8 h h l l x 9 l h h h h 1.5 v 1.5 v 0 v 0 v 0 v 0 v t pzh t phz t pzl t plz 3 v 0 v v od(h) ~ 1 v ~ 1 v v od(l) input, de/re output, v od output, v od a at 3v s1 to b a at 0v s1 to a figure 6. driver enable time waveforms notes: a. all input pulses are supplied by a generator having the following characteristics: t r 6 ns, t f 6 ns, prr 1 mhz, duty cycle = 50%, z o = 50 w . b. all resistances are in w and 5%, unless otherwise indicated. c. all capacitances are in pf and 10%, unless otherwise indicated. d. all indicated voltages are 10 mv.
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 13 post office box 655303 ? dallas, texas 75265 parameter measurement information 2 a 620 w v t output 40 pf 3 b+ b de/re 0 v or 3 v 3 v or 0 v input 2 cde0 is high, cde1, cde2, bsr, and cre are low and, for the sn75976a only, all others are open. 3 includes probe and jig capacitance. figure 7. receiver enable and disable time test circuit indeterminate indeterminate t plz t pzl 1.4 v 1.4 v 1.4 v 1.4 v 1.4 v 1.4 v 3 v 0 v input output v od output v od b + at 0 v b at 3 v v t = v cc b + at 3 v b at 0 v v t = 0 t phz t pzh figure 8. receiver enable and disable time waveforms notes: a. all input pulses are supplied by a generator having the following characteristics: t r 6 ns, t f 6 ns, prr 1 mhz, duty cycle = 50%, z o = 50 w . b. all resistances are in w and 5%, unless otherwise indicated. c. all capacitances are in pf and 10%, unless otherwise indicated. d. all indicated voltages are 10 mv.
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 14 post office box 655303 ? dallas, texas 75265 typical characteristics figure 9 200 100 50 0 250 150 0.001 0.01 0.1 1 10 100 average supply current ma f frequency mhz average supply current vs frequency i cc 9 receivers 9 drivers figure 10 0123 logic input current logic input current vs input voltage 45 30 25 20 15 10 5 0 v i input voltage v a, de/re ,cre,bsr a m i i figure 11 input current ma input current vs input voltage 15 10 5 0 5 10 20 15 10 5 0 5 10 15 20 i i v i input voltage v bus figure 12 1 0.5 0 0 102030405060 low-level output voltage v 1.5 2 low-level output voltage vs low-level output current 2.5 70 80 90 100 driver v ol i ol low-level output current ma
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 15 post office box 655303 ? dallas, texas 75265 typical characteristics figure 13 2 1.5 0.5 0 high-level output voltage v 2.5 3.5 high-level output voltage vs high-level output current 4 1 3 0 20 40 60 80 100 v oh driver i oh high-level output current ma figure 14 1.5 1 0.5 0 0 40 60 100 2 average differential output voltage vs average case temperature 2.5 140 20 80 120 v od(l) , v cc = 5.25 v v od(l) , v cc = 4.75 v v od(h) , v cc = 5.25 v v od(h) , v cc = 4.75 v driver t c average case temperature c s1 to position b (see figure 1) average differential output voltage v v od || figure 15 6 4 14 2 0 20406080 propagation delay time ns 10 8 12 propagation delay time vs case temperature 16 100 120 140 t pd t c case temperature c t plh(max) receiver t phl(min) (data extracted from 7 wafer lots) v cc = 5 v t phl(max) t plh(min) figure 16 4 2 12 0 0 20406080 8 6 10 propagation delay time vs case temperature 14 100 120 140 v cc = 5 v, s1 to position b (see figure 1) t phl(max) t plh(min) t plh(max) driver propagation delay time ns t pd data extracted from 7 wafer lots t c case temperature c t phl(min)
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 16 post office box 655303 ? dallas, texas 75265 typical characteristics 01 23 output current ma output current vs supply voltage 456 100 80 60 40 20 0 20 40 60 80 driver i oh i ol t a = 25 c i o v cc supply voltage v figure 17
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 17 post office box 655303 ? dallas, texas 75265 application information table 2. typical signal and terminal assignments signal terminal scsi data scsi control ipi data ipi control cde0 54 diffsense diffsense v cc v cc cde1 55 gnd gnd xmta, xmtb gnd cde2 56 gnd gnd xmta, xmtb slave/master bsr 2 gnd gnd gnd, bsr gnd cre 3 gnd gnd gnd v cc 1a 4 db0, db8 atn ad7, bd7 not used 1de/re 5 dbe0, dbe8 init en gnd gnd 2a 6 db1, db9 bsy ad6, bd6 not used 2de/re 7 dbe1, dbe9 bsy en gnd gnd 3a 8 db2, db10 ack ad5, bd5 sync in 3de/re 9 dbe2, dbe10 init en gnd gnd 4a 10 db3, db11 rst ad4, bd4 slave in 4de/re 11 dbe3, dbe11 gnd gnd gnd 5a 19 db4, db12 msg ad3, bd3 not used 5de/re 20 dbe4, dbe12 targ en gnd gnd 6a 21 db5, db13 sel ad2, bd2 sync out 6de/re 22 dbe5, dbe13 sel en gnd gnd 7a 23 db6, db14 c/d ad1, bd1 master out 7de/re 24 dbe6, dbe14 targ en gnd gnd 8a 25 db7, db15 req ad0, bd0 select out 8de/re 26 dbe7, dbe15 targ en gnd gnd 9a 27 dbp0, dbp1 i/o ap, bp attention in 9de/re 28 dbpe0, dbpe1 targ en xmta, xmtb v cc abbreviations: dbn = data bit n, where n = (0,1, . . . ,15) dben = data bit n enable, where n = (0,1, . . . ,15) dbp0 = parity bit for data bits 0 through 7 or ipi bus a dbpe0 = parity bit enable for p0 dbp1 = parity bit for data bits 8 through 15 or ipi bus b dbpe1 = parity bit enable for p1 adn or bdn = ipi bus a bit n (adn) or bus b bit n (bdn), where n = (0,1, ...,7) ap or bp = ipi parity bit for bus a or bus b xmta or xmtb = transmit enable for ipi bus a or b bsr = bit significant response init en = common enable for scsi initiator mode targ en = common enable for scsi target mode note a: signal inputs are shown as active high. when only active-low inputs are available, logic inversion is accomplished by reversing the b + and b connector terminal assignments.
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 18 post office box 655303 ? dallas, texas 75265 application information function tables receiver driver inputs outputs l l h h de/re ab+ l h l h z z l h z z h l inputs output a l h b+ 2 b 2 h l l h input a outputs l h b+ b l h h l b transceiver driver with enable inputs outputs l l h h de/re ab+ 2 l h l h h l b 2 ab+ l h l h h l b wired-or driver two-enable input driver input a outputs l h b+ b z h z l inputs outputs l l h h de/re ab+ l h l h z h l h z l h l b a b b+ a a de/re de/re b b+ b b+ a de/re b b+ b b+ a b b+ a h = high level, l = low level, x = irrelevant, z = high impedance (off) 2 an h in this column represents a voltage of 200 mv or higher than the other bus input. an l represents a voltage of 200 mv or l ower than the other bus input. any voltage less than 200 mv results in an indeterminate receiver output.
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 19 post office box 655303 ? dallas, texas 75265 application information nb nb + na nde/re + en i/o 620 w 2 + en i /o + scsi connector scsi connector scsi connector i o + en o 3 + en o 3 + 620 w scsi connector scsi connector scsi connector i o i i (a) active-high bidirectional i/o with separate enable (b) active-low bidirectional i/o with separate enable (c) wired-or driver and active-high input (d) separate active-high input, output, and enable (e) separate active-low input and output and active-high enable (f) wired-or driver and active-low input v cc 620 w 2 v cc na nde/re nb nb + 620 w 2 v cc na nde/re nb nb + 620 w 2 v cc na nde/re nb nb + 620 w 2 v cc 620 w 2 v cc na nde/re nb nb + 620 w 2 v cc na nde/re nb nb + 2 when 0 is open drain 3 must be open-drain or 3-state output note a: the bsr, cre , a, and de/re inputs have internal pullup resistors. cde0, cde1, and cde2 have internal pulldown resistors. figure 18. typical scsi transceiver connections
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 20 post office box 655303 ? dallas, texas 75265 application information channel logic configurations with control input logic the following logic diagrams show the positive-logic representation for all combinations of control inputs. the control inputs are from msb to lsb; the bsr, cde0, cde1, cde2, and cre bit values are shown below the diagrams. channel 1 is at the top of the logic diagrams; channel 9 is at the bottom of the logic diagrams. hi-z hi-z hi-z hi-z hi-z hi-z figure 19. 00000 figure 20. 00001 figure 21. 00010 figure 22. 00011 figure 23. 00100
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 21 post office box 655303 ? dallas, texas 75265 application information hi-z hi-z hi-z hi-z hi-z hi-z figure 24. 00101 figure 25. 00110 figure 26. 00111 figure 28. 01001 figure 27. 01000
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 22 post office box 655303 ? dallas, texas 75265 application information figure 32. 01101 figure 33. 01110 figure 29. 01010 figure 30. 01011 figure 31. 01100
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 23 post office box 655303 ? dallas, texas 75265 application information hi-z figure 34. 0 1111 figure 35. 10000 and 10001 figure 36. 10010 and 10011 figure 37. 10100 and 10101 figure 38. 10110 and 10111 hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z hi-z
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 24 post office box 655303 ? dallas, texas 75265 application information hi-z figure 39. 11000 and 11001 figure 40. 11010 and 11011 figure 41. 11100 and 11101 hi-z hi-z hi-z figure 42. 11110 and 11111
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 25 post office box 655303 ? dallas, texas 75265 mechanical information dgg (r-pdso-g**) plastic small-outline package 4040078 / d 08/96 48 pin shown 56 14,10 13,90 0,25 48 dim a max a min pins ** 0,15 nom gage plane 6,00 6,20 8,30 7,90 12,40 12,60 0,75 0,50 seating plane 25 0,27 0,17 24 a 48 1 0,05 min 1,20 max 64 17,10 16,90 m 0,08 0,10 0,50 0 8 notes: b. all linear dimensions are in millimeters. c. this drawing is subject to change without notice. d. falls within jedec mo-153
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 26 post office box 655303 ? dallas, texas 75265 mechanical information dl (r-pdso-g**) plastic small-outline package 4040048 / b 02/95 48 pin shown 56 0.730 (18,54) 0.720 (18,29) 48 28 0.370 (9,40) (9,65) 0.380 gage plane dim 0.420 (10,67) 0.395 (10,03) a min a max 0.006 (0,15) nom pins ** 0.630 (16,00) (15,75) 0.620 0.010 (0,25) seating plane 0.020 (0,51) 0.040 (1,02) 25 24 0.008 (0,203) 0.012 (0,305) 48 1 0.008 (0,20) min a 0.110 (2,79) max 0.299 (7,59) 0.291 (7,39) 0.004 (0,10) m 0.005 (0,13) 0.025 (0,635) 0 8 notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
sn75976a, sn55976a 9-channel differential transceiver slls218b may 1995 revised may 1997 27 post office box 655303 ? dallas, texas 75265 mechanical information wd (r-gdfp-f**) ceramic dual flatpack 4040176 / c 04/96 0.005 (0,13) nom 0.010 (0,25) typ a 0.390 (9,91) a (15,49) 0.610 (16,00) 0.630 0.730 (18,54) 0.710 (18,03) min max 56 48 0.370 (9,40) 48 pin shown 48 1 24 25 0.120 (3,05) 0.075 (1,91) 1.200 (30,50) 0.950 (24,13) 0.025 (0,635) no. of pins** notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a ceramic lid using glass frit. d. index point is provided on cap for pin identification only e. falls within mil-std-1835: gdfp1-f48 and jedec mo -146aa gdfp1-f56 and jedec mo -146ab
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 5962-9689301qxa active cfp wd 56 1 tbd a42 snpb n / a for pkg type sn55976a1wd active cfp wd 56 1 tbd a42 snpb n / a for pkg type SN75976A1DGG active tssop dgg 56 35 green (rohs & no sb/br) cu nipdau level-2-260c-1 year SN75976A1DGGg4 active tssop dgg 56 35 green (rohs & no sb/br) cu nipdau level-2-260c-1 year SN75976A1DGGr active tssop dgg 56 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year SN75976A1DGGrg4 active tssop dgg 56 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a1dl active ssop dl 56 20 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a1dlg4 active ssop dl 56 20 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a1dlr active ssop dl 56 1000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a1dlrg4 active ssop dl 56 1000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a2dgg active tssop dgg 56 35 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a2dggg4 active tssop dgg 56 35 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a2dggr active tssop dgg 56 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a2dggrg4 active tssop dgg 56 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a2dl active ssop dl 56 20 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a2dlg4 active ssop dl 56 20 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a2dlr active ssop dl 56 1000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year sn75976a2dlrg4 active ssop dl 56 1000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year snj55976a1wd active cfp wd 56 1 tbd a42 snpb n / a for pkg type (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs package option addendum www.ti.com 9-oct-2007 addendum-page 1
compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 9-oct-2007 addendum-page 2
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant SN75976A1DGGr tssop dgg 56 2000 330.0 24.4 8.6 15.6 1.8 12.0 24.0 q1 sn75976a1dlr ssop dl 56 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 q1 sn75976a2dggr tssop dgg 56 2000 330.0 24.4 8.6 15.6 1.8 12.0 24.0 q1 sn75976a2dlr ssop dl 56 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 q1 package materials information www.ti.com 11-mar-2008 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) SN75976A1DGGr tssop dgg 56 2000 346.0 346.0 41.0 sn75976a1dlr ssop dl 56 1000 346.0 346.0 49.0 sn75976a2dggr tssop dgg 56 2000 346.0 346.0 41.0 sn75976a2dlr ssop dl 56 1000 346.0 346.0 49.0 package materials information www.ti.com 11-mar-2008 pack materials-page 2
mechanical data msso001c ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 dl (r-pdso-g**) plastic small-outline package 4040048 / e 12/01 48 pins shown 56 0.730 (18,54) 0.720 (18,29) 48 28 0.370 (9,40) (9,65) 0.380 gage plane dim 0.420 (10,67) 0.395 (10,03) a min a max 0.010 (0,25) pins ** 0.630 (16,00) (15,75) 0.620 0.010 (0,25) seating plane 0.020 (0,51) 0.040 (1,02) 25 24 0.008 (0,203) 0.0135 (0,343) 48 1 0.008 (0,20) min a 0.110 (2,79) max 0.299 (7,59) 0.291 (7,39) 0.004 (0,10) m 0.005 (0,13) 0.025 (0,635) 0 ? 8 0.005 (0,13) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). d. falls within jedec mo-118
mechanical data mtss003d january 1995 revised january 1998 post office box 655303 ? dallas, texas 75265 dgg (r-pdso-g**) plastic small-outline package 4040078 / f 12/97 48 pins shown 0,25 0,15 nom gage plane 6,00 6,20 8,30 7,90 0,75 0,50 seating plane 25 0,27 0,17 24 a 48 1 1,20 max m 0,08 0,10 0,50 0 8 56 14,10 13,90 48 dim a max a min pins ** 12,40 12,60 64 17,10 16,90 0,15 0,05 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold protrusion not to exceed 0,15. d. falls within jedec mo-153
mechanical data mcfp010b january 1995 revised november 1997 post office box 655303 ? dallas, texas 75265 wd (r-gdfp-f**) ceramic dual flatpack 4040176 / d 10/97 48 leads shown 48 48 25 56 0.610 (18,80) 0.710 (18,03) 0.740 0.640 0.390 (9,91) 0.370 (9,40) 0.870 (22,10) 1.130 (28,70) 1 a 0.120 (3,05) 0.075 (1,91) leads** 24 no. of a min a max (16,26) (15,49) 0.025 (0,635) 0.009 (0,23) 0.004 (0,10) 0.370 (9,40) 0.250 (6,35) 0.370 (9,40) 0.250 (6,35) 0.014 (0,36) 0.008 (0,20) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a ceramic lid using glass frit. d. index point is provided on cap for terminal identification only e. falls within mil std 1835: gdfp1-f48 and jedec mo -146aa gdfp1-f56 and jedec mo -146ab
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